1. Field of the Invention
The present invention relates to semiconductor memory devices and to methods of forming the same. More specifically, the present invention relates to the structure of a semiconductor device whereat a lower electrode is disposed over underlying layers and to methods of forming the same.
2. Description of the Related Art
The reduction in line widths of patterned portions of semiconductor devices, as facilitated by improvements in semiconductor device fabricating techniques, is accompanied by decreases in the horizontal dimension and increases in the vertical dimension of various elements of the devices, such as capacitors. The surface area of the lower electrodes of such capacitors directly relates to the capacitance that can be offered by the capacitors. Therefore, a capacitor is formed with a large height so that the lower electrode thereof will have a large surface area, whereby a certain value of capacitance can be provided.
That is, as semiconductor devices become more highly integrated within a chip, the widths of the capacitors are correspondingly reduced. Accordingly, the heights thereof are increased to compensate for the decrease in their width and still provide the same capacitance. As a result, the area of the interface between the lower electrode and the underlying layers is becoming smaller because the interface is determined by the width of the lower electrode. Thus, the adherence of the lower electrode to the underlying layers becomes weaker, so much so that the lower electrode may separate from the underlying layers during the fabricating process. Consequently, adjacent lower electrodes may become electrically connected to each other.
FIG. 1 shows a conventional cylindrical lower electrode structure of a capacitor. Problems posed by the conventional lower electrode structure of a capacitor will be explained with reference to this figure. A contact plug 18 penetrates an insulation layer 12 to electrically connect with an active region (not shown) of a semiconductor substrate 10. A cylindrical lower electrode 28 is disposed on the insulation layer 12 and the contact plug 18. As semiconductor devices become more highly integrated, the width W of the lower electrode 28 tends to decrease and the height H thereof tends to increase. Therefore, an interface area CA decreases where the lower electrode 28 and the underlying layers (i.e., the contact plug 18 and the insulation layer 12) are in contact with each other tends to decrease. Thus, the lower electrode may lean to one side or collapse due to surface tension during a cleaning process carried out after the process of forming the lower electrode. In such a case, adjacent lower electrodes may become electrically connected to each other.